Vol. 12, Issue 3, 2015July 01, 2015 EDT
New Stacked Die Interconnect Technology for High-Performance and Low-Cost FPGA
New Stacked Die Interconnect Technology for High-Performance and Low-Cost FPGA
Kwon, Woon-Seong, Suresh Ramalingam, Xin Wu, Liam Madden, C. Y. Huang, Hung-Hsien Chang, Chi-Hsin Chiu, Steve Chiu, and Stephen Chen. 2015. “New Stacked Die Interconnect Technology for High-Performance and Low-Cost FPGA.” Journal of Microelectronics and Electronic Packaging 12 (3): 111–17. https://doi.org/10.4071/imaps.452.