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Vol. 7, Issue 3, 2010July 01, 2010 EDT

Assembly Process Development for Fine Pitch Flip Chip Silicon-to-Silicon 3D Wafer Level Integration with No Flow Underfill

Zhaozhi Li, Sangil Lee, Brian J. Lewis, Paul N. Houston, Daniel F. Baldwin, Eugene A. Stout, Theodore G. Tessier, John L. Evans,
No flow underfillflip chipwafer level packagingsilicon to/on siliconchip floatingunderfill voiding
Copyright Logoccby-nc-nd-4.0 • https://doi.org/10.4071/imaps.262
Journal of Microelectronics & Elect Pkg
Li, Zhaozhi, Sangil Lee, Brian J. Lewis, Paul N. Houston, Daniel F. Baldwin, Eugene A. Stout, Theodore G. Tessier, and John L. Evans. 2010. “Assembly Process Development for Fine Pitch Flip Chip Silicon-to-Silicon 3D Wafer Level Integration with No Flow Underfill.” Journal of Microelectronics and Electronic Packaging 7 (3): 146–51. https:/​/​doi.org/​10.4071/​imaps.262.
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