Vol. 7, Issue 1, 2010January 01, 2010 EDT
Development and Characterization of Tapered Silicon Etch Process by Topography Modeling for TSV Application
Development and Characterization of Tapered Silicon Etch Process by Topography Modeling for TSV Application
Ranganathan, N., A. Malar, D.Y. Lee, K. Prasad, and K.L. Pey. 2010. “Development and Characterization of Tapered Silicon Etch Process by Topography Modeling for TSV Application.” Journal of Microelectronics and Electronic Packaging 7 (1): 58–66. https://doi.org/10.4071/1551-4897-7.1.58.