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Vol. 6, Issue 3, 2009July 01, 2009 EDT

Vertical Arrays of Copper Nanotube Grown on Silicon Substrate by CMOS Compatible Electrochemical Process for IC Packaging Applications

Daniel Choi, Viola Fucsko, E. H. Yang, Jung-Rae Park, Fahad Khalid, Young-Kun Kim,
Copper nanotubeselectrodepositionthermal conductivitypackaging
Copyright Logoccby-nc-nd-4.0 • https://doi.org/10.4071/1551-4897-6.3.154
Journal of Microelectronics & Elect Pkg
Choi, Daniel, Viola Fucsko, E. H. Yang, Jung-Rae Park, Fahad Khalid, and Young-Kun Kim. 2009. “Vertical Arrays of Copper Nanotube Grown on Silicon Substrate by CMOS Compatible Electrochemical Process for IC Packaging Applications.” Journal of Microelectronics and Electronic Packaging 6 (3): 154–57. https:/​/​doi.org/​10.4071/​1551-4897-6.3.154.
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