ISSN 1551-4897
Vol. 17, Issue 3, 2020July 01, 2020 EDT
Chip-Last (RDL-First) Fan-Out Panel-Level Packaging (FOPLP) for Heterogeneous Integration
Chip-Last (RDL-First) Fan-Out Panel-Level Packaging (FOPLP) for Heterogeneous Integration
Articles in Vol. 17, Issue 3, 2020
Vol. 17, Issue 3, 2020
- A New Halogen-Free Parylene for High Performance and Reliability of Microelectronics in Harsh EnvironmentsRakesh KumarFrank KeDustin EnglandAngie SummersLamar Young
- Chip-Last (RDL-First) Fan-Out Panel-Level Packaging (FOPLP) for Heterogeneous IntegrationJohn H. LauCheng-Ta KoChia-Yu PengKai-Ming YangTim XiaPuru Bruce LinJean-Jou ChenPo-Chun HuangTzvy-Jang TsengEagle LinLeo ChangCurry LinWinnie Lu
- High-Density Interconnect Technology Assessment of Printed Circuit Boards for Space ApplicationsMaarten CauweBart VandeveldeChinmay NawghaneMarnix Van De SlyekeErwin BosmanJoachim VerheggeAlexia CoulonStan Heltzel
- High-Temperature Double-Layer Ceramic Packaging SubstratesArdalan NasiriSimon S. Ang
- Development of High Thermally Conductive Die Attach for TIM ApplicationsMaciej PatelkaSho IkedaKoji SasakiHiroki MyodoNortisuka Mizumura
Lau, John H., Cheng-Ta Ko, Chia-Yu Peng, Kai-Ming Yang, Tim Xia, Puru Bruce Lin, Jean-Jou Chen, et al. 2020. “Chip-Last (RDL-First) Fan-Out Panel-Level Packaging (FOPLP) for Heterogeneous Integration.” Journal of Microelectronics and Electronic Packaging 17 (3): 89–98. https://doi.org/10.4071/imaps.1137828.