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Vol. 17, Issue 3, 2020July 01, 2020 EDT

Chip-Last (RDL-First) Fan-Out Panel-Level Packaging (FOPLP) for Heterogeneous Integration

John H. Lau, Cheng-Ta Ko, Chia-Yu Peng, Kai-Ming Yang, Tim Xia, Puru Bruce Lin, Jean-Jou Chen, Po-Chun Huang, Tzvy-Jang Tseng, Eagle Lin, Leo Chang, Curry Lin, Winnie Lu,
Fan-out packagingRDL-firstchip-lastpanel-level packagingheterogeneous integrationdrop test
Copyright Logoccby-nc-nd-4.0 • https://doi.org/10.4071/imaps.1137828
Journal of Microelectronics & Elect Pkg
Lau, John H., Cheng-Ta Ko, Chia-Yu Peng, Kai-Ming Yang, Tim Xia, Puru Bruce Lin, Jean-Jou Chen, et al. 2020. “Chip-Last (RDL-First) Fan-Out Panel-Level Packaging (FOPLP) for Heterogeneous Integration.” Journal of Microelectronics and Electronic Packaging 17 (3): 89–98. https:/​/​doi.org/​10.4071/​imaps.1137828.
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