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Vol. 18, Issue 2, 2021April 01, 2021 EDT

Thermal Cycling Test and Simulation of Fan-Out Chip-Last Panel-Level Packaging for Heterogeneous Integration

John H Lau, Cheng-Ta Ko, Chia-Yu Peng, Kai-Ming Yang, Tim Xia, Puru Bruce Lin, Jean-Jou Chen, Po-Chun Huang, Tzvy-Jang Tseng, Eagle Lin, Leo Chang, Curry Lin, Yan-Jun Fan, Hsing-Ning Liu, Winnie Lu,
Reliabilityheterogeneous integrationfan-out chip-last panel-level technology
Copyright Logoccby-nc-nd-4.0 • https://doi.org/10.4071/imaps.1419800
Journal of Microelectronics & Elect Pkg
Lau, John H, Cheng-Ta Ko, Chia-Yu Peng, Kai-Ming Yang, Tim Xia, Puru Bruce Lin, Jean-Jou Chen, et al. 2021. “Thermal Cycling Test and Simulation of Fan-Out Chip-Last Panel-Level Packaging for Heterogeneous Integration.” Journal of Microelectronics and Electronic Packaging 18 (2): 29–39. https:/​/​doi.org/​10.4071/​imaps.1419800.

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