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Vol. 18, Issue 2, 2021April 01, 2021 EDT

Thermal Cycling Test and Simulation of Six-Side Molded Panel-Level Chip-Scale Packages (PLCSPs)

John H Lau, Cheng-Ta Ko, Chia-Yu Peng, Tzvy-Jang Tseng, Kai-Ming Yang, Tim Xia, Puru Bruce Lin, Eagle Lin, Leo Chang, Hsing Ning Liu, Curry Lin, Yan-Jun Fan, David Cheng, Winnie Lu,
Thermal CyclingTestSimulationSix-Side MoldedPanel-Level Chip-Scale PackagesPLCSPs
Copyright Logoccby-nc-nd-4.0 • https://doi.org/10.4071/imaps.1421341
Journal of Microelectronics & Elect Pkg
Lau, John H, Cheng-Ta Ko, Chia-Yu Peng, Tzvy-Jang Tseng, Kai-Ming Yang, Tim Xia, Puru Bruce Lin, et al. 2021. “Thermal Cycling Test and Simulation of Six-Side Molded Panel-Level Chip-Scale Packages (PLCSPs).” Journal of Microelectronics and Electronic Packaging 18 (2): 67–80. https:/​/​doi.org/​10.4071/​imaps.1421341.
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