Vol. 17, Issue 4, 2020October 01, 2020 EDT
Six-Side Molded Panel-Level Chip-Scale Package with Multiple Diced Wafers
Six-Side Molded Panel-Level Chip-Scale Package with Multiple Diced Wafers
John H. Lau, Cheng-Ta Ko, Tzvy-Jang Tseng, Chia-Yu Peng, Kai-Ming Yang, Tim Xia, Puru Bruce Lin, Eagle Lin, Leo Chang, Hsing Ning Liu, Curry Lin, David Cheng, Winnie Lu,
Lau, John H., Cheng-Ta Ko, Tzvy-Jang Tseng, Chia-Yu Peng, Kai-Ming Yang, Tim Xia, Puru Bruce Lin, et al. 2020. “Six-Side Molded Panel-Level Chip-Scale Package with Multiple Diced Wafers.” Journal of Microelectronics and Electronic Packaging 17 (4): 111–20. https://doi.org/10.4071/imaps.1226533.