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ISSN 1551-4897
General
Vol. 17, Issue 1, 2020January 01, 2020 EDT

Cu Pillar Bump Development for 7-nm Chip Package Interaction (CPI) Technology

Lei Fu, Milind Bhagavat, Cheryl Selvanayagam, Ken Leong, Ivor Barber,
7 nmchip package interaction (CPI)Cu pillar bumpextremely low K (ELK)finite element analysis (FEA)qualificationreliabilitysimulationelectromigration (EM)
Copyright Logoccby-nc-nd-4.0 • https://doi.org/10.4071/imaps.968260

Articles in Vol. 17, Issue 1, 2020

Vol. 17, Issue 1, 2020
  • Cu Pillar Bump Development for 7-nm Chip Package Interaction (CPI) Technology
    Lei FuMilind BhagavatCheryl SelvanayagamKen LeongIvor Barber
  • Sporadic Early Life Solder Ball Detachment Effects on Subsequent Microstructure Evolution and Fatigue of Solder Joints in Wafer-Level Chip-Scale Packages
    Simon SchambeckMatthias HutterJohannes JaeschkeAndrea DeutingerMartin Schneider-Ramelow
  • A Technique for Detecting Moisture Absorption in Printed Circuit Boards
    Jeffery D. CravenAriel R. OldagRobert N. Dean
  • High Temperature and High Reliability Performance of Electrically Conductive Film Adhesives for RF Grounding Applications
    Yuan ZhaoDoug KatzeJohn WoodBruno TollaHoward Yun
  • Synthesis and Characterization of Physical Properties of MgO Thin Films by Various Concentrations
    Nadjat ChaouchSaid BenramacheSaid Lakel
Journal of Microelectronics & Elect Pkg
Fu, Lei, Milind Bhagavat, Cheryl Selvanayagam, Ken Leong, and Ivor Barber. 2020. “Cu Pillar Bump Development for 7-Nm Chip Package Interaction (CPI) Technology.” Journal of Microelectronics and Electronic Packaging 17 (1): 1–8. https://doi.org/10.4071/imaps.968260.
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