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Journal of Microelectronics & Elect Pkg
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ISSN 1551-4897
General
Vol. 12, Issue 3, 2015July 01, 2015 EDT

High Shear Speed Characteristics of Sub-100 μm Low Alpha SAC105 Solder Bump Directly Fabricated on Cu Filled Through Si Via for 3D Integration

Do Hyun Jung, Shalu Agarwal, Santosh Kumar, Jae Pil Jung,
Through Si vialow alpha soldersoft errorelectroplatinghigh-speed shear test
Copyright Logoccby-nc-nd-4.0 • https://doi.org/10.4071/imaps.416

Articles in Vol. 12, Issue 3, 2015

Vol. 12, Issue 3, 2015
  • New Stacked Die Interconnect Technology for High-Performance and Low-Cost FPGA
    Woon-Seong KwonSuresh RamalingamXin WuLiam MaddenC. Y. HuangHung-Hsien ChangChi-Hsin ChiuSteve ChiuStephen Chen
  • Challenges of Scalable 2.5D IC Assembly
    Liang WangCharles G. WoychikGuilian GaoGrant VillavicencioScott McGrathHong ShenSitaram Arkalgud
  • Packaging Design and Assembly for Ultrahigh Energy Density Microbatteries
    Caroline K. BjuneThomas F. MarinisYet-Ming Chiang
  • Bonded Ceramic-Metal Layers for Fabrication of Thermal Conduction Plates
    Madhav Datta
  • Warpage Evaluation of High-Temperature Sandwich-Structured Power Module for SiC Power Semiconductor Devices
    Takeshi AnzaiYoshinori MurakamiShinji SatoHidekazu TanisawaKohei HiyamaHiroki TakahashiFumiki KatoHiroshi Sato
  • High Shear Speed Characteristics of Sub-100 μm Low Alpha SAC105 Solder Bump Directly Fabricated on Cu Filled Through Si Via for 3D Integration
    Do Hyun JungShalu AgarwalSantosh KumarJae Pil Jung
  • Impact of Grain Structure and Material Properties on Via Extrusion in 3D Interconnects
    Tengfei JiangChenglin WuJay ImRui HuangPaul S. Ho
  • Design Considerations of High-Current Density Capacitors Micromachined for Si Interposers
    A. N. BealJ. TatarchuckC. B. StevensT. A. BaginskiM. C. HamiltonR. N. Dean
Journal of Microelectronics & Elect Pkg
Jung, Do Hyun, Shalu Agarwal, Santosh Kumar, and Jae Pil Jung. 2015. “High Shear Speed Characteristics of Sub-100 Μm Low Alpha SAC105 Solder Bump Directly Fabricated on Cu Filled Through Si Via for 3D Integration.” Journal of Microelectronics and Electronic Packaging 12 (3): 161–69. https://doi.org/10.4071/imaps.416.
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