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ISSN 1551-4897
General
Vol. 3, Issue 4, 2006October 01, 2006 EDT

Methods for Reducing Power Loss in On-Wafer Inductors

Päivi H. Karjalainen, Pekka Heino,
CMOSinductorintegrated components
Copyright Logoccby-nc-nd-4.0 • https://doi.org/10.4071/1551-4897-3.4.194

Articles in Vol. 3, Issue 4, 2006

Vol. 3, Issue 4, 2006
  • MEMS Technologies and Devices for Single-Chip RF Front-Ends
    Clark T.-C. Nguyen
  • Acceleration Factor to relate Thermal Cycles to Power Cycles for Ceramic Ball Grid Area Array Packages
    Andy PerkinsKrishna TungaSuresh Sitaraman
  • LTCC Post Load Cell
    Mário R. Gongora-RubioM. RobertiZ M. da RochaL Fraigi
  • Methods for Reducing Power Loss in On-Wafer Inductors
    Päivi H. KarjalainenPekka Heino
  • Analysis of Embedded Baluns in 3D Packages
    Matti MäntysaloPekka Heino
  • Fabrication and Testing of a Micromirror Device Actuated by PZT Thin Films
    Z.M. XiaoB.J. ChenH. Fan
  • Electrical Characterization of FCBGA Package Based on Measurement Approach for High-speed SOC Applications
    Ming-Kun ChenCheng-Chi TaiYu-Jung Huang
Journal of Microelectronics & Elect Pkg
Karjalainen, Päivi H., and Pekka Heino. 2006. “Methods for Reducing Power Loss in On-Wafer Inductors.” Journal of Microelectronics and Electronic Packaging 3 (4): 194–200. https://doi.org/10.4071/1551-4897-3.4.194.
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